US 11,889,413 B2
Switched analog-digital architecture for wireless antenna arrays and methods for use thereof
Sundeep Rangan, Jersey City, NJ (US); Theodore S. Rappaport, Riner, VA (US); and Dennis Shasha, New York, NY (US)
Assigned to NEW YORK UNIVERSITY, New York, NY (US)
Filed by New York University, New York, NY (US)
Filed on Apr. 7, 2016, as Appl. No. 15/093,326.
Claims priority of provisional application 62/143,865, filed on Apr. 7, 2015.
Prior Publication US 2016/0302146 A1, Oct. 13, 2016
Int. Cl. H04W 52/02 (2009.01); H04B 7/06 (2006.01); H04B 7/04 (2017.01)
CPC H04W 52/0209 (2013.01) [H04B 7/0686 (2013.01); H04B 7/04 (2013.01); Y02D 30/70 (2020.08)] 16 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a switchable architecture (SA) conversion system, comprising;
a plurality of different quantization resolution architecture (QRA) receive analog-to-digital (A/D) conversion systems (CSs), comprising at least a first receive CS configured as selectively enableable-disableable and to convert, when enabled, first signals to first quantization resolution (QR) samples of the first signals, and at least a second QRA receive CS configured as selectively enableable-disableable and to A/D convert, when enabled, second signals to second QR samples of the second signals, wherein the first QR is lower than the second QR, and
a circuit configured to couple to a plurality of antenna elements and to couple signals from an antenna element among the antenna elements concurrently to the first QRA receive CS as first signals and to the second QRA receive CS as second signals;
a processor, connected to and configured to selectively switch the SA conversion system by selectively enabling-disabling the first QRA receive CS and selectively enabling-disabling the second QRA receive CS, to a selectable one among a plurality of different conversion architectures including:
a first QR conversion architecture comprising the first QRA receive CS enabled and the second QRA receive CS disabled, and
a second QR conversion architecture comprising the second QRA receive CS enabled and the first QRA receive CS disabled, wherein:
the processor is further configured to store a first duration and a second duration, and to selectively perform a switched architecture reception process by operations including:
controlling, by disabling the second QRA receive CS and enabling the first QRA receive CS, the SA conversion system configure to and to operate for the first duration in the first QR conversion architecture, outputting from the enabled first QRA receive CS the first QR samples of the first signals,
performing a first QR processing using the first QR samples of the first signals,
controlling, by disabling the first QRA receive CS and enabling the second QRA receive CS, the SA conversion system, in association with an end of the first duration, to configure to and to operate for the second duration in the second QR conversion architecture, outputting from the enabled second QRA receive CS the second QR samples of the second signals, and
performing a second QR processing using the second QR samples of the second signals.