US 11,889,210 B2
Image sensors
Jerome Chossat, Voiron (FR); and Mathieu Thivin, Voreppe (FR)
Assigned to STMicroelectronics (Grenoble 2) SAS, Grenoble (FR)
Filed by STMicroelectronics (Grenoble 2) SAS, Grenoble (FR)
Filed on Jan. 13, 2022, as Appl. No. 17/575,070.
Claims priority of application No. 2100897 (FR), filed on Jan. 29, 2021.
Prior Publication US 2022/0247946 A1, Aug. 4, 2022
Int. Cl. H04N 25/68 (2023.01); H04N 25/772 (2023.01); H04N 25/702 (2023.01); H04N 25/76 (2023.01); H04N 25/683 (2023.01)
CPC H04N 25/68 (2023.01) [H04N 25/772 (2023.01)] 24 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
a first array of image pixels having inputs coupled to first selection tracks and outputs coupled to first output tracks;
at least one second array of test pixels having inputs coupled to second selection tracks and outputs coupled to the first output tracks;
at least one third array of test pixels having inputs coupled to the first selection tracks and outputs coupled to second output tracks; and
a processor coupled to receive output signals on the first and second output tracks;
wherein each test pixel of the second and third arrays is configured to generate the output signal at one of only two possible reference voltage values set by a circuit connection of the test pixel in the absence of a selection track defect or output track defect; and
wherein the processor is configured to identify existence of the selection track defect or output track defect in response to the output signal received from one or a plurality of the test pixels having a value other than said one of the two possible reference voltage values set by the circuit connection.