CPC H04L 63/123 (2013.01) [G06F 8/60 (2013.01); H04L 45/72 (2013.01); H04L 63/08 (2013.01); H04L 67/568 (2022.05)] | 25 Claims |
1. An edge computing verification node, comprising:
a plurality of hardware components, including processing circuitry; and
a memory device including instructions embodied thereon, wherein the instructions, which when executed by the processing circuitry, configure the hardware components to perform operations to:
obtain a trust representation of an edge computing feature, the edge computing feature provided by an edge computing node, the trust representation defined according to a trust calculus, and the trust representation provided in a data model of a manifest expressed according to a data definition language, wherein the trust representation defines properties of attestation for the edge computing verification node to validate before establishing trust in compute results produced from a use of the edge computing feature;
receive, from the edge computing node, the compute results produced from the use of the edge computing feature;
receive, from the edge computing node, attestation evidence associated with the use of the edge computing feature;
attempt validation of the attestation evidence based on the properties of attestation defined by the data model of the manifest; and
communicate an indication of trustworthiness for the compute results, based on the validation of the attestation evidence.
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