US 11,888,587 B2
Tolerant PCS for accurate timestamping in disaggregated network elements and synchronization method
John Andrew Earl, Ottawa (CA); David James Evans, Ottawa (CA); David Stuart, Ottawa (CA); and Daniel Claude Perras, Ottawa (CA)
Assigned to Ciena Corporation, Hanover, MD (US)
Filed by Ciena Corporation, Hanover, MD (US)
Filed on Jul. 15, 2021, as Appl. No. 17/376,232.
Prior Publication US 2023/0029041 A1, Jan. 26, 2023
Int. Cl. H04J 3/06 (2006.01); H04W 92/04 (2009.01)
CPC H04J 3/0667 (2013.01) [H04J 3/067 (2013.01); H04J 3/0655 (2013.01); H04J 3/0673 (2013.01); H04W 92/04 (2013.01)] 15 Claims
OG exemplary drawing
 
9. A method comprising:
receiving data for transmission;
encoding the data for communication to a device via a plurality of physical channels;
utilizing one of the plurality of physical channels as a dedicated timing channel, to the device for synchronization, wherein the dedicated timing channel includes encoding thereon different from encoding on the other plurality of physical channels;
transmitting the encoded data via the plurality of physical channels through a port communicatively coupled to the second device, the port including a transmitter and a receiver; and
performing a three layer timestamp exchange including between a Precision Timer Protocol (PTP) application layer including a PTP clock, an interworking function to the dedication timing channel, and the dedicated timing channel.