CPC H03K 21/02 (2013.01) [H03L 7/08 (2013.01)] | 20 Claims |
1. An apparatus for synchronizing a counter to an input trigger signal, the apparatus comprising:
a data acquisition component for sampling and recording values of the counter in response to a detection of rising and/or falling edges of the input trigger signal, wherein the sampling is performed at rising and falling edges of a common clock signal supplied to the counter and the data acquisition component; and
a control circuit for reading the recorded values and calculating at least one of an offset and a configurable delay of the counter based on the recorded values and predetermined collected values that are collected, by the control circuit, from predefined counter values that correspond to the rising and/or falling edges of the input trigger signal.
|