US 11,888,394 B2
High-efficiency pulse width modulation for switching power converters
Kevin Yi Cheng Chang, Chandler, AZ (US); and Kelly Consoer, Chandler, AZ (US)
Assigned to DIALOG SEMICONDUCTOR (UK) LIMITED, London (GB)
Filed by DIALOG SEMICONDUCTOR (UK) LIMITED, London (GB)
Filed on Aug. 31, 2021, as Appl. No. 17/462,985.
Application 17/462,985 is a division of application No. 16/450,829, filed on Jun. 24, 2019, granted, now 11,108,321.
Prior Publication US 2021/0399636 A1, Dec. 23, 2021
Int. Cl. H02M 3/156 (2006.01); H03K 5/24 (2006.01); H02M 1/08 (2006.01); H02M 1/00 (2006.01)
CPC H02M 3/156 (2013.01) [H02M 1/08 (2013.01); H03K 5/24 (2013.01); H02M 1/0048 (2021.05)] 8 Claims
OG exemplary drawing
 
1. A switching power converter pulse width modulator, comprising:
an error signal generator configured to generate an error signal that is proportional to a difference between an output voltage and a reference voltage;
a ramp signal generator configured to generate a ramp signal;
a clock-edge generator configured to assert an enable signal for an enable period responsive to a level-shifted version of the error signal being equal to the ramp signal; and
a sense-amplifier-based comparator configured to be enabled by the assertion of the enable signal during the enable period, wherein the sense-amplifier-based comparator is further configured to assert a comparator output signal responsive to the ramp signal being equal to the error signal only while the sense-amplifier-based comparator is enabled.