CPC H02M 1/4225 (2013.01) [H03L 7/091 (2013.01)] | 11 Claims |
1. A system for operating a first PFC element and a second PFC element in an interleaved manner, said system comprising:
a first integrated circuit having a first PFC controller;
a second integrated circuit having a second PFC controller;
a synchronization circuit connecting the first integrated circuit and the second integrated circuit, the synchronization circuit including a phase detector adapted to generate output signals in dependence on a phase relation between a signal provided by the first integrated circuit and a signal provided by the second integrated circuit, said output signals being sent to the first integrated circuit or to the second integrated circuit; and
wherein the synchronization circuit is adapted to control the first integrated circuit and the second integrated circuit such that the first PFC element and the second PFC element are operated in anti-phase;
wherein the phase detector is realized as a flip-flop, which is provided with a gate signal of a transistor of the first integrated circuit, as well as with a gate signal of a transistor of the second integrated circuit; and
wherein a first output signal of the flip-flop is sent to an error amplifier of the first integrated circuit, and a second output signal of the flip-flop is sent to an error amplifier of the second integrated circuit.
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