CPC H01L 29/0847 (2013.01) [H01L 21/823814 (2013.01); H01L 21/823828 (2013.01); H01L 27/092 (2013.01); H01L 29/165 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/78 (2013.01); H01L 29/7848 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A semiconductor device, comprising:
an active pattern on a substrate;
a pair of source/drain patterns on the active pattern;
a channel pattern interposed between the pair of source/drain patterns, the channel pattern including semiconductor patterns, which are stacked to be spaced apart from each other;
a gate electrode crossing the channel pattern, the gate electrode including a first portion in a space between adjacent ones of the semiconductor patterns; and
a liner layer provided in the space and interposed between the first portion and the adjacent ones of the semiconductor patterns,
wherein the liner layer comprises a same semiconductor material as the semiconductor patterns, and
wherein the liner layer is interposed between the first portion and one of the pair of source/drain patterns to contact a side surface of the one of the pair of source/drain patterns.
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