US 11,887,988 B2
Thin film transistor structures with regrown source and drain
Ashish Agrawal, Hillsboro, OR (US); Jack Kavalieros, Portland, OR (US); Anand Murthy, Portland, OR (US); Gilbert Dewey, Hillsboro, OR (US); Matthew Metz, Portland, OR (US); Willy Rachmady, Beaverton, OR (US); Cheng-Ying Huang, Hillsboro, OR (US); and Cory Bomberger, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 1, 2019, as Appl. No. 16/529,643.
Prior Publication US 2021/0036023 A1, Feb. 4, 2021
Int. Cl. H01L 27/12 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/417 (2006.01)
CPC H01L 27/1207 (2013.01) [H01L 29/0847 (2013.01); H01L 29/1033 (2013.01); H01L 29/41733 (2013.01); H01L 29/66742 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) structure, comprising:
one or more levels of metallization; and
a transistor structure over at least one of the levels of metallization, the transistor structure comprising:
a source material separated from a drain material by a first length of channel material, wherein the channel material has a first composition comprising a Group IV, a Group III-V, or metal oxide material, and the source material and the drain material have a second composition, different than the first composition, and comprising Sn as a majority constituent and one or more p-type impurities;
a gate electrode separated from the channel, source, and drain materials by one or more gate dielectric materials, wherein the gate electrode has a second length, in a direction parallel to the first length, that is larger than the first length; and
a source contact metallization coupled to the source material, and a drain contact metallization coupled to the drain material.