US 11,887,950 B2
Solid-state imaging device and electronic apparatus
Takuya Nakamura, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 17/293,198
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Oct. 17, 2019, PCT No. PCT/JP2019/040915
§ 371(c)(1), (2) Date May 12, 2021,
PCT Pub. No. WO2020/105331, PCT Pub. Date May 28, 2020.
Claims priority of application No. 2018-217455 (JP), filed on Nov. 20, 2018.
Prior Publication US 2022/0005776 A1, Jan. 6, 2022
Int. Cl. H01L 23/00 (2006.01); H01L 27/146 (2006.01)
CPC H01L 24/06 (2013.01) [H01L 24/03 (2013.01); H01L 24/04 (2013.01); H01L 24/05 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/14685 (2013.01); H01L 27/1464 (2013.01); H01L 27/14627 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/02313 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05024 (2013.01); H01L 2224/05073 (2013.01); H01L 2224/05083 (2013.01); H01L 2224/05157 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05186 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/0601 (2013.01); H01L 2224/06505 (2013.01); H01L 2924/04941 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A solid-state imaging device, comprising:
a first semiconductor device including:
a semiconductor layer that includes:
a photoelectric conversion unit configured to photoelectrically convert incident light; and
a penetrating via;
a first connecting portion on a surface side of the semiconductor layer, wherein the surface side of the semiconductor layer is configured to receive the incident light;
a second connecting portion on the surface side of the semiconductor layer; and
a connecting wiring line that connects the first connecting portion, the second connecting portion, and the penetrating via, wherein
the connecting wiring line includes a first wiring line and a second wiring line, and
the first connecting portion is in a recessed structure included in the second wiring line; and
a second semiconductor device that is mounted on the first semiconductor device with the first connecting portion,
wherein the solid-state imaging device is connected to an external terminal by the second connecting portion.