US 11,887,940 B2
Integrated circuit packages with conductive element having cavities housing electrically connected embedded components
Seok Ling Lim, Kulim (MY); Jenny Shio Yin Ong, Bayan Lepas (MY); Bok Eng Cheah, Penang (MY); and Jackson Chung Peng Kong, Tanjung Tokong (MY)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 17, 2020, as Appl. No. 17/125,593.
Application 17/125,593 is a continuation of application No. 15/974,393, filed on May 8, 2018, granted, now 10,910,325.
Claims priority of application No. 2017701956 (MY), filed on May 29, 2017.
Prior Publication US 2021/0167023 A1, Jun. 3, 2021
Int. Cl. H01L 23/00 (2006.01); H01L 23/528 (2006.01); H01L 23/50 (2006.01); H01L 23/13 (2006.01); H01L 23/498 (2006.01); H01L 49/02 (2006.01)
CPC H01L 23/562 (2013.01) [H01L 23/13 (2013.01); H01L 23/50 (2013.01); H01L 23/5283 (2013.01); H01L 24/09 (2013.01); H01L 24/32 (2013.01); H01L 28/10 (2013.01); H01L 28/20 (2013.01); H01L 28/40 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/19105 (2013.01)] 14 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) structure, comprising:
a package substrate having a first contact and a second contact on a surface and a conductive pathway electrically coupled to the second contact;
a die electrically coupled to the surface of the package substrate;
a conductive element having opposing first and second faces, wherein the first face of the conductive element has a recessed cavity, wherein the first face of the conductive element is electrically coupled to the package substrate via the first contact; and
a component embedded in the recessed cavity of the conductive element and having a first terminal end electrically coupled to the die via the second contact and the conductive pathway in the package substrate, wherein the first terminal end is associated with a ground reference voltage.