US 11,887,937 B2
Reduction in susceptibility of analog integrated circuits and sensors to radio frequency interference
Benjamin Joseph Sheahan, Eindhoven (NL); Richard Jennings, Eindhoven (NL); Robert Allen Helmick, Eindhoven (NL); Marko Magerl, Eindhoven (NL); and Christian Stockreiter, Eindhoven (NL)
Assigned to ams International AG, Jona (CH)
Appl. No. 17/428,914
Filed by ams International AG, Jona (CH)
PCT Filed Feb. 3, 2020, PCT No. PCT/EP2020/052635
§ 371(c)(1), (2) Date Aug. 5, 2021,
PCT Pub. No. WO2020/161080, PCT Pub. Date Aug. 13, 2020.
Claims priority of provisional application 62/803,049, filed on Feb. 8, 2019.
Prior Publication US 2022/0254729 A1, Aug. 11, 2022
Int. Cl. H01L 23/552 (2006.01); H01L 23/538 (2006.01); H01L 23/66 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/552 (2013.01) [H01L 23/5389 (2013.01); H01L 23/66 (2013.01); H01L 24/06 (2013.01); H01L 24/49 (2013.01); H01L 2224/48091 (2013.01); H01L 2924/14 (2013.01); H01L 2924/3025 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a ground plane;
an integrated circuit chip disposed on the ground plane, the integrated circuit chip comprising one or more electrically conductive layers encircling a periphery of the integrated circuit chip; and
a plurality of bondwires electrically coupling the one or more electrically conductive layers to the ground plane.