US 11,887,901 B2
Semiconductor device and test apparatus and method thereof
Jae Won Kim, Daejeon (KR); Yong Jun Ban, Daejeon (KR); Wan Tae Kim, Daejeon (KR); Jin A Kim, Daejeon (KR); and Soo Chul Jeon, Daejeon (KR)
Assigned to SILICON WORKS CO., LTD., Daejeon (KR)
Filed by SILICON WORKS CO., LTD., Daejeon (KR)
Filed on Sep. 13, 2021, as Appl. No. 17/472,994.
Claims priority of application No. 10-2020-0122669 (KR), filed on Sep. 23, 2020.
Prior Publication US 2022/0093477 A1, Mar. 24, 2022
Int. Cl. H01L 21/66 (2006.01); G01R 31/28 (2006.01); H01L 23/522 (2006.01)
CPC H01L 22/34 (2013.01) [G01R 31/2886 (2013.01); H01L 23/5228 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an external resistor circuit disposed to be dispersed along an outer region of a chip, wherein
the external resistor circuit includes:
an external resistor structure including at least one of a diffusion layer, a polysilicon layer, and a wiring layer;
an external transistor connected to the external resistor structure; and
a first test pad disposed in a chip pad region and connected to the external transistor via the external resistor structure, and
the external resistor circuit is configured to output a current of the external transistor to the first test pad based on a change in a resistance value of the external resistor structure.