US 11,887,665 B2
Memory cell programming that cancels threshold voltage drift
Hari Giduturi, Folsom, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 14, 2022, as Appl. No. 17/720,542.
Application 17/720,542 is a continuation of application No. 17/005,739, filed on Aug. 28, 2020, granted, now 11,309,024.
Prior Publication US 2022/0238157 A1, Jul. 28, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/00 (2006.01); G11C 13/00 (2006.01)
CPC G11C 13/0069 (2013.01) [G11C 13/003 (2013.01); G11C 2013/0078 (2013.01); G11C 2213/15 (2013.01); G11C 2213/73 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a memory having a plurality of memory cells; and
circuitry configured to program a memory cell of the plurality of memory cells to one of two possible data states by:
applying a first voltage pulse to the memory cell, wherein:
the first voltage pulse has a negative polarity; and
the first voltage pulse has a first magnitude; and
applying a second voltage pulse to the memory cell, wherein:
the second voltage pulse has a positive polarity; and
the second voltage pulse has a second magnitude; and
wherein the one of the two possible data states to which the memory cell is being programmed is in the negative polarity direction.