US 11,887,651 B2
Temperature informed memory refresh
Gianni Stephen Alsasua, Rancho Cordova, CA (US); Harish Reddy Singidi, Fremont, CA (US); Kishore Kumar Muchherla, Fremont, CA (US); Sampath Ratnam, San Jose, CA (US); Ashutosh Malshe, Fremont, CA (US); Vamsi Pavan Rayaprolu, San Jose, CA (US); and Renato Padilla, Jr., Folsom, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 16, 2022, as Appl. No. 17/745,262.
Application 17/745,262 is a continuation of application No. 17/238,846, filed on Apr. 23, 2021, granted, now 11,335,394.
Application 17/238,846 is a continuation of application No. 17/017,201, filed on Sep. 10, 2020, granted, now 10,998,034.
Application 17/017,201 is a continuation of application No. 16/855,579, filed on Apr. 22, 2020, granted, now 10,796,745.
Application 16/855,579 is a continuation of application No. 16/138,115, filed on Sep. 21, 2018, granted, now 10,672,452.
Prior Publication US 2022/0277787 A1, Sep. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/406 (2006.01); G06F 13/16 (2006.01); G11C 7/04 (2006.01)
CPC G11C 11/40626 (2013.01) [G06F 13/1636 (2013.01); G11C 7/04 (2013.01); G11C 11/40615 (2013.01); G11C 2211/4061 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a memory component comprising a plurality of memory component elements; and
a processing device, communicatively coupled to the memory component when in operation, the processing device configured to perform operations comprising:
resetting a write temperature counter for an individual memory component element, of the plurality of memory component elements, in response to the individual memory component element being either erased or opened;
measuring an ambient temperature while a write is performed on the individual memory component element;
updating the write temperature counter in response to the ambient temperature being outside of a defined temperature window;
generating, based on at least the write temperature counter, a sort-value for the individual memory component element by combining a Low Write Temperature Counter and a High Write Temperature Counter; and
selecting the individual memory component element for refresh based on the sort-value.