US 11,886,879 B2
Processor, processor operation method and electronic device comprising same for selective instruction execution based on operand address
Dong Kyue Kim, Seoul (KR); and Piljoo Choi, Busan (KR)
Assigned to ICTK Holdings Co., Ltd., Busan (KR); and IUCF-HYU (Industry-University Cooperation Foundation Hanyang University), Seoul (KR)
Appl. No. 17/630,892
Filed by ICTK Holdings Co., Ltd., Seongnam-si (KR); and IUCF-HYU(Industry-University Cooperation Foundation Hanyang University), Seoul (KR)
PCT Filed Aug. 6, 2020, PCT No. PCT/KR2020/010414
§ 371(c)(1), (2) Date Jan. 27, 2022,
PCT Pub. No. WO2021/025490, PCT Pub. Date Feb. 11, 2021.
Claims priority of application No. 10-2019-0095684 (KR), filed on Aug. 6, 2019; application No. 10-2020-0006817 (KR), filed on Jan. 17, 2020; and application No. 10-2020-0098056 (KR), filed on Aug. 5, 2020.
Prior Publication US 2022/0283814 A1, Sep. 8, 2022
Int. Cl. G06F 9/30 (2018.01); G06F 9/54 (2006.01); G06F 21/60 (2013.01); G06F 21/72 (2013.01); G06F 21/52 (2013.01); G06F 12/14 (2006.01)
CPC G06F 9/30145 (2013.01) [G06F 9/30105 (2013.01); G06F 9/544 (2013.01); G06F 12/14 (2013.01); G06F 21/52 (2013.01); G06F 21/602 (2013.01); G06F 21/72 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A processor operation method comprising:
identifying an instruction for instructing execution of a first operation and address information of an operand corresponding to the instruction; and
executing the instruction based on whether or not the address information of the operand satisfies a predetermined condition,
wherein the executing of the instruction comprises:
executing a second operation set for the instruction on the operand if the address information of the operand satisfies the predetermined condition; and
executing the first operation on the operand if the address information of the operand does not satisfy the predetermined condition,
wherein if the address information of the operand satisfies the predetermined condition, a round counter and a round-key pointer used in an operation of the processor are stored in a data-buffer in the processor and address information of the round counter and address information of the round-key pointer are stored in a configuration-buffer in the processor.