US 11,886,745 B2
Illegal operation reaction at a memory device
Nathaniel J. Meier, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 27, 2022, as Appl. No. 17/660,938.
Prior Publication US 2023/0350604 A1, Nov. 2, 2023
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving, at a memory device, a set of commands to perform a set of respective access operations on an array of memory cells of the memory device;
determining that one or more thresholds associated with operation of the memory device would be violated by performing the set of respective access operations; and
erasing at least a subset of the array of memory cells of the memory device based at least in part on determining that the one or more thresholds associated with the operation of the memory device would be violated.