US 11,886,623 B2
Integrated communication security
Alistair Black, Los Gatos, CA (US); and Ashitosh Swarup, Burbank, CA (US)
Assigned to Cuica LLC, Plano, TX (US)
Filed by Cuica LLC, Plano, TX (US)
Filed on Sep. 29, 2022, as Appl. No. 17/956,261.
Application 17/956,261 is a continuation of application No. 17/235,840, filed on Apr. 20, 2021, granted, now 11,494,521.
Claims priority of provisional application 63/052,856, filed on Jul. 16, 2020.
Prior Publication US 2023/0033634 A1, Feb. 2, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 21/78 (2013.01); G06F 1/06 (2006.01); G06F 21/71 (2013.01); G11C 7/22 (2006.01)
CPC G06F 21/78 (2013.01) [G06F 1/06 (2013.01); G06F 21/71 (2013.01); G11C 7/222 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit utilizing a clock signal at a first frequency to coordinate operations, comprising:
a port configured to receive an encryption sequence from another system at the first frequency;
a first unidirectional data path between the port and a memory configured to:
permit data transfer from the port to the memory; and
prevent data transfer from the memory to the port;
the memory configured to access the encryption sequence from the port via the first unidirectional data path and store the encryption sequence;
an encryption/decryption module configured to read a portion of the encryption sequence from the memory via a second unidirectional data path at a second frequency that is lower than the first frequency, process input using the portion of the encryption sequence, and generate output based on the processing; and
a blockchain configured to implement tamper detection, wherein the blockchain is constructed via combining a blockchain header with at least a portion of the encryption sequence, and wherein the tamper detection is implemented by performing periodic reads of the blockchain header that is altered from a default state due to tampering.