US 11,886,339 B2
Secure logical-to-physical caching
Zoltan Szubbocsev, Santa Clara, CA (US); Alberto Troia, Munich (DE); Federico Tiziani, Munich (DE); and Antonino Mondello, Messina (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 23, 2022, as Appl. No. 17/750,989.
Application 17/750,989 is a continuation of application No. 16/915,476, filed on Jun. 29, 2020, granted, now 11,341,050.
Application 16/915,476 is a continuation of application No. 16/023,485, filed on Jun. 29, 2018, granted, now 10,698,816.
Prior Publication US 2022/0283940 A1, Sep. 8, 2022
Int. Cl. G06F 12/08 (2016.01); G06F 12/0802 (2016.01); G06F 12/1009 (2016.01); G06F 12/02 (2006.01); H04L 9/32 (2006.01); H04L 9/08 (2006.01)
CPC G06F 12/0802 (2013.01) [G06F 12/0246 (2013.01); G06F 12/1009 (2013.01); H04L 9/0861 (2013.01); H04L 9/3247 (2013.01); G06F 2212/402 (2013.01); G06F 2212/7201 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a first device; and
a second device, the second device being programmed to perform operations comprising:
receiving, from the first device, a first message, the first message comprising:
first data describing a first logical address at the first device and a first physical address at the first device, the first physical address at the first device corresponding to the first logical address at the first device; and
first cryptographic data;
executing a first cryptographic operation based at least in part on the first data and a cryptographic key;
verifying the first cryptographic data based at least in part on the first cryptographic operation; and
caching, by the second device, the first data at a memory of the second device.