US 11,886,336 B2
Managing workload of programming sets of pages to memory device
Kishore Kumar Muchherla, Fremont, CA (US); Karl D. Schuh, Santa Cruz, CA (US); Jiangang Wu, Milpitas, CA (US); Mustafa N. Kaynak, San Diego, CA (US); Devin M. Batutis, San Jose, CA (US); and Xiangang Luo, Fremont, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 31, 2023, as Appl. No. 18/103,876.
Application 18/103,876 is a continuation of application No. 16/948,302, filed on Sep. 11, 2020, granted, now 11,609,846.
Prior Publication US 2023/0176963 A1, Jun. 8, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/04 (2006.01); G06F 12/02 (2006.01); G06F 12/0846 (2016.01); G06F 12/0882 (2016.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01)
CPC G06F 12/0246 (2013.01) [G06F 12/0848 (2013.01); G06F 12/0882 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/3404 (2013.01); G06F 2212/7207 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device comprising a plurality of dice; and
a processing device, operatively coupled to the memory device, the processing device to perform operations, comprising:
receiving a memory operation to program a set of pages of data across at least a subset of the plurality of dice;
partitioning the set of pages into a set of partitions;
associating a first partition of the set of partitions with a first block family;
assigning the first block family to a first threshold voltage offset bin; and
storing, in a metadata table, at least one bit to indicate that the set of pages is partitioned.