US 11,885,837 B2
Ultra-low leakage test verification circuit
Roger Clarke, Newell, WV (US)
Assigned to Automatic Timing & Controls, Inc., Newell, WV (US)
Filed by Automatic Timing & Controls, Inc., Newell, WV (US)
Filed on Nov. 21, 2022, as Appl. No. 17/991,190.
Application 17/991,190 is a continuation of application No. 16/948,405, filed on Sep. 17, 2020, granted, now 11,506,692.
Prior Publication US 2023/0090456 A1, Mar. 23, 2023
Int. Cl. G01R 19/165 (2006.01); G01R 31/52 (2020.01); G01R 31/327 (2006.01); G01R 31/26 (2020.01)
CPC G01R 19/16519 (2013.01) [G01R 19/16523 (2013.01); G01R 31/2621 (2013.01); G01R 31/327 (2013.01); G01R 31/52 (2020.01)] 19 Claims
OG exemplary drawing
 
1. An ultra-low leakage test verification circuit for verifying proper operation of a tested circuit, comprising:
an N-channel MOSFET configured for switching ON and OFF the test verification circuit during a power outage; and
a voltage source that provides an input voltage to the N-channel MOSFET from a conserved power supply, wherein a potential at a gate of the N-channel MOSFET is biased to a level greater than an operational voltage of the test verification circuit;
wherein the N-channel MOSFET provides temporary power from the conserved power supply to the test verification circuit upon activation by a user during a power outage; and
wherein the test verification circuit determines whether the tested circuit has been de-energized, remains energized, or there remains inadequate power to complete the test.