US 11,885,716 B2
Test method of a semiconductor device and manufacturing method of a semiconductor device
Hajime Sasaki, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Appl. No. 16/629,498
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
PCT Filed Oct. 10, 2017, PCT No. PCT/JP2017/036667
§ 371(c)(1), (2) Date Jan. 8, 2020,
PCT Pub. No. WO2019/073519, PCT Pub. Date Apr. 18, 2019.
Prior Publication US 2020/0124492 A1, Apr. 23, 2020
Int. Cl. G01M 3/04 (2006.01); G01N 25/56 (2006.01); G01M 3/16 (2006.01); H01L 21/66 (2006.01); H01L 21/78 (2006.01)
CPC G01M 3/047 (2013.01) [G01M 3/16 (2013.01); G01N 25/56 (2013.01); H01L 21/78 (2013.01); H01L 22/26 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A test method of a semiconductor device having a package with an airtight space, which is provided between a substrate wafer in which an element is formed and a cap wafer which is made of a material which can transmit an infrared ray and is provided opposite to the substrate wafer, the test method comprising:
a water applying process in which the semiconductor device is exposed to a moisture atmosphere; and
a leak discrimination process in which an infrared ray transmitted from the semiconductor device is detected and a leak of the package is discriminated based on absorption of the infrared ray by water molecules are included, wherein
the leak discrimination process comprises the steps of:
supplying electric power to the element which is formed in the substrate wafer; and
discriminating the leak of the package based on an infrared ray spectrum, which is radiated from the element and is radiated outside the package.