US 11,882,421 B2
Multi-channel cinema amplifier with power-sharing, messaging and multi-phase power supply
Andrew Healy, San Francisco, CA (US); Edward John Neary, Pleasant Hill, CA (US); Erich Hubert Vogel, Oakland, CA (US); Andrew Michael Poulain, San Jose, CA (US); Gregory J. Long, Inverness, CA (US); Joel A. Butler, Springfield, MO (US); Angela Williams, San Francisco, CA (US); Luca Revelli, Larkspur, CA (US); Dossym Nurmukhanov, Millbrae, CA (US); Tanner James Cook, Alameda, CA (US); Marcelo Traverso M., San Jose, CA (US); and Kenneth Schindler, Alameda, CA (US)
Assigned to Dolby Laboratories Licensing Corporation, San Francisco, CA (US)
Filed by DOLBY LABORATORIES LICENSING CORPORATION, San Francisco, CA (US)
Filed on Mar. 2, 2023, as Appl. No. 18/177,708.
Application 18/177,708 is a continuation of application No. 17/862,812, filed on Jul. 12, 2022, granted, now 11,601,759.
Application 17/862,812 is a continuation of application No. 17/400,856, filed on Aug. 12, 2021, granted, now 11,418,109, issued on Aug. 16, 2022.
Application 17/400,856 is a continuation of application No. 16/073,686, granted, now 11,121,620, issued on Sep. 14, 2021, previously published as PCT/US2017/015459, filed on Jan. 27, 2017.
Claims priority of provisional application 62/429,682, filed on Dec. 2, 2016.
Claims priority of provisional application 62/289,037, filed on Jan. 29, 2016.
Claims priority of application No. 16153471 (EP), filed on Jan. 29, 2016.
Prior Publication US 2023/0209267 A1, Jun. 29, 2023
Int. Cl. H02M 1/32 (2007.01); H04R 5/04 (2006.01); H03F 3/68 (2006.01); H03G 3/00 (2006.01); H03G 3/30 (2006.01)
CPC H04R 5/04 (2013.01) [H02M 1/32 (2013.01); H03F 3/68 (2013.01); H03G 3/007 (2013.01); H03G 3/3005 (2013.01); H02M 1/325 (2021.05); H02M 1/327 (2021.05)] 20 Claims
OG exemplary drawing
 
1. A power supply for a multi-channel amplifier, the power supply comprising:
a multi-phase power factor correction (PFC) circuit configured to boost input mains alternating current (AC) power to a final PFC output voltage, wherein the multi-phase PFC circuit comprises a first array of fault detection and protection devices, wherein a first set of fault detection and protection devices is coupled to a respective boost stage for each phase of the multi-phase PFC circuit;
a first interface to a system controller, wherein the system controller is configured to
receive first fault information from the first array of fault detection and protection devices, and
transmit the first fault information to components that are configured to provide failure compensation measures based on the first fault information; and
a first output combinatorial circuit configured to sum a first output voltage from each respective boost stage to produce the final PFC output voltage.