CPC H04L 67/12 (2013.01) [H04L 69/18 (2013.01)] | 17 Claims |
1. A system comprising:
a processor; and
memory including instructions that are executable by the processor to cause the processor to:
receive, by a transaction management layer, a transaction request from a transaction channel of a plurality of transaction channels, the transaction request being in a channel-specific format associated with the transaction channel;
in response to a downstream transaction processing system processing the transaction request, receive a status indicator of the processing of the transaction request;
transform the status indicator into the channel-specific format associated with the transaction channel by:
receiving the status indicator from the downstream transaction processing system in a transaction processing format of the downstream transaction processing system;
transforming the status indicator into an internal specific format of the transaction management layer based on a first mapping from the transaction processing format to the internal specific format; and
transforming the status indicator into the channel-specific format of the transaction channel based on a second mapping from the internal specific format to the channel-specific format; and
send the status indicator in the channel-specific format to the transaction channel, the transaction channel configured to perform an action in response to receiving the status indicator.
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