CPC H04L 5/0035 (2013.01) [H04B 7/024 (2013.01); H04B 7/0626 (2013.01); H04B 7/0632 (2013.01); H04L 5/00 (2013.01); H04L 5/005 (2013.01); H04L 43/16 (2013.01); H04W 16/32 (2013.01); H04W 24/08 (2013.01); H04W 24/10 (2013.01); H04W 52/146 (2013.01); H04W 72/02 (2013.01); H04W 72/0473 (2013.01); H04W 76/27 (2018.02); H04B 7/0639 (2013.01); H04L 5/001 (2013.01); H04W 36/0088 (2013.01); H04W 52/242 (2013.01); H04W 72/542 (2023.01); H04W 88/085 (2013.01)] | 15 Claims |
1. An integrated circuit comprising:
circuitry, which, in operation, controls:
receiving, by Radio Resource Control (RRC) signaling, a Channel State Information Reference Signal (CSI-RS) candidate list including a first CSI-RS configuration and a second CSI-RS configuration, each of the first CSI-RS configuration and the second CSI-RS configuration including a CSI-RS individual offset;
generating a transmission signal including at least one of a measurement result corresponding to the first CSI-RS configuration or a measurement result corresponding to the second CSI-RS configuration; and
transmitting the transmission signal in response to at least one of a first value or a second value being greater than a threshold, the first value being equal to the measurement result corresponding to the first CSI-RS configuration offset by the CSI-RS individual offset included in the first CSI-RS configuration, the second value being equal to the measurement result corresponding to the second CSI-RS configuration offset by the CSI-RS individual offset included in the second CSI-RS configuration.
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