US 11,881,343 B2
Layered process-constructed double-winding embedded solenoid inductor
Aleksey S. Khenkin, Austin, TX (US); David Patten, Austin, TX (US); and Jun Yan, Austin, TX (US)
Assigned to Cirrus Logic, Inc., Austin, TX (US)
Filed by Cirrus Logic International Semiconductor Ltd., Edinburgh (GB)
Filed on Feb. 11, 2021, as Appl. No. 17/173,486.
Claims priority of provisional application 62/989,076, filed on Mar. 13, 2020.
Prior Publication US 2021/0287841 A1, Sep. 16, 2021
Int. Cl. H01F 7/06 (2006.01); H01F 27/28 (2006.01); H01F 17/00 (2006.01); H01F 27/24 (2006.01); H01F 41/08 (2006.01)
CPC H01F 27/2804 (2013.01) [H01F 17/0013 (2013.01); H01F 27/24 (2013.01); H01F 41/08 (2013.01)] 22 Claims
OG exemplary drawing
1. A method for constructing a solenoid inductor, comprising:
positioning an inner winding substantially around a magnetic core;
positioning an outer winding substantially around the inner winding;
using a layered process to perform said positioning the inner and outer windings;
processing a first conducting layer that is a bottom layer of the outer winding;
processing a first dielectric layer above the first conducting layer;
processing a second conducting layer above the first dielectric layer that is a bottom layer of the inner winding;
processing a second dielectric layer above the second conducting layer;
processing a magnetic core layer above the second dielectric layer;
processing a third dielectric layer above the magnetic core layer;
processing a third conducting layer above the third dielectric layer that is a top layer of the inner winding;
processing a fourth dielectric layer above the third conducting layer;
processing a fourth conducting layer above the fourth dielectric layer that is a top layer of the outer winding; and
processing a fifth dielectric layer above the fourth conducting layer;
wherein the inner and outer windings are electrically connected.