CPC H10K 59/88 (2023.02) [G09G 3/3233 (2013.01); H10K 59/131 (2023.02); G09G 2300/0413 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01)] | 20 Claims |
1. A display panel having a display area, the display area including a light-transmitting region, at least one first region and a second region, the at least one first region being located at least at a side of the light-transmitting region; the display panel comprising:
a plurality of sub-pixels disposed in the at least one first region and the second region, the plurality of sub-pixels being arranged in a plurality of rows and a plurality of columns, each sub-pixel including a pixel driving circuit, the plurality of sub-pixels including a plurality of effective sub-pixels and a plurality of dummy sub-pixels, the plurality of dummy sub-pixels being disposed in the at least one first region; each effective sub-pixel further including a first light-emitting device electrically connected to a pixel driving circuit;
a plurality of second light-emitting devices disposed in the light-transmitting region, the plurality of second light-emitting devices being arranged in a plurality of columns, each column of second light-emitting devices and a column of sub-pixels in the second region are arranged in a same column;
a plurality of data lines and a plurality of auxiliary connection lines, the plurality of data lines including first data lines and second data lines; wherein a first data line is electrically connected to pixel driving circuits in a column of sub-pixels including at least one dummy sub-pixel, a second data line is electrically connected to pixel driving circuits in a column of sub-pixels in the second region and located in a same column as a column of second light-emitting devices, and a second light-emitting device in the column of second light-emitting devices is electrically connected to a pixel driving circuit in a dummy sub-pixel connected to the first data line through an auxiliary connection line of the plurality of auxiliary connection lines, wherein the plurality of auxiliary connection lines are disposed in a same layer; and
first transistors, the first data line being electrically connected to the second data line through a first transistor of the first transistors.
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