	US 12,207,512 B2
	Light-emitting diode displays
Cheng-Ho Yu, Milpitas, CA (US); Chin-Wei Lin, San Jose, CA (US); Shyuan Yang, San Jose, CA (US); Ting-Kuo Chang, San Jose, CA (US); Tsung-Ting Tsai, San Jose, CA (US); Warren S. Rieutort-Louis, Cupertino, CA (US); Shih-Chang Chang, Cupertino, CA (US); Yu Cheng Chen, San Jose, CA (US); and John Z. Zhong, Saratoga, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Nov. 17, 2023, as Appl. No. 18/513,132.
Application 18/513,132 is a continuation of application No. 17/513,643, filed on Oct. 28, 2021, granted, now 11,895,883.
Application 17/513,643 is a continuation of application No. 16/826,521, filed on Mar. 23, 2020, granted, now 11,233,113, issued on Jan. 25, 2022.
Application 16/826,521 is a continuation of application No. 16/224,607, filed on Dec. 18, 2018, granted, now 10,636,847, issued on Apr. 28, 2020.
Application 16/224,607 is a continuation of application No. 15/919,057, filed on Mar. 12, 2018, granted, now 10,192,938, issued on Jan. 29, 2019.
Application 15/919,057 is a continuation of application No. PCT/US2017/022808, filed on Mar. 16, 2017.
Claims priority of provisional application 62/327,584, filed on Apr. 26, 2016.
Claims priority of provisional application 62/314,281, filed on Mar. 28, 2016.
Prior Publication US 2024/0099086 A1, Mar. 21, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10K 59/131 (2023.01); G06F 3/044 (2006.01); G09G 3/3233 (2016.01); G09G 3/3266 (2016.01); H10K 59/10 (2023.01); H10K 59/40 (2023.01); H10K 59/88 (2023.01)

CPC H10K 59/131 (2023.02) [G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); H10K 59/40 (2023.02); H10K 59/88 (2023.02); G06F 3/044 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0809 (2013.01); G09G 2310/0232 (2013.01); G09G 2320/0223 (2013.01); G09G 2320/0233 (2013.01); H10K 59/10 (2023.02)]

20 Claims

1. A display having an active area and a pixel-free region, the display comprising:

an array of pixels;

data lines coupled to the pixels; and

gate lines coupled to the pixels, wherein the pixels are arranged in columns and rows, wherein the rows in a first area of the display that includes the pixel-free region are coupled to fewer of the pixels than the rows in a second area of the display, and wherein at least some of the gate lines in the first area have progressively decreasing amounts of loading at progressively increasing distances from the second area.