an input for receiving a control signal; and

a bootstrap capacitor electrically connected between the voltage source and the output, the output being connected to ground by a low side FET when the control signal corresponds to a charging phase, thereby charging the bootstrap capacitor to a charged voltage without delay, the bootstrap capacitor being electrically connected to the gate terminal of the high side FET such that, when the control signal corresponds to a driving phase and the bootstrap capacitor is electrically disconnected from ground by the low side FET, the charged voltage on the bootstrap capacitor is applied to the gate of the high side FET to provide an output voltage at the output;

a pre-driven charging circuit comprising a pre-driven FET having a drain terminal connected to the supply voltage, a source terminal connected to the gate terminal of the high side FET, and a gate, wherein the gate of the pre-driven FET receives a logic inversion of the control signal during a pre-driven period before the control signal at the input corresponds to the charging phase, such that, during the pre-driven period before the charging phase, the pre-driven FET allows current to flow from the supply voltage to apply a pre-driven voltage to the gate terminal of the high side FET, such that less charge from the bootstrap capacitor is required to charge the gate terminal of the high side FET to a final desired voltage during the charging phase.