	US 12,206,013 B2
	Post-formation mends of dielectric features
Wan-Yi Kao, Hsinchu County (TW); Yung-Cheng Lu, Hsinchu (TW); Che-Hao Chang, Hsinchu (TW); Chi On Chui, Hsinchu (TW); and Hung Cheng Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jun. 30, 2023, as Appl. No. 18/346,020.
Application 18/346,020 is a continuation of application No. 17/728,296, filed on Apr. 25, 2022, granted, now 11,710,782.
Application 17/728,296 is a continuation of application No. 16/952,550, filed on Nov. 19, 2020, granted, now 11,316,034, issued on Apr. 26, 2022.
Claims priority of provisional application 63/032,431, filed on May 29, 2020.
Prior Publication US 2023/0352568 A1, Nov. 2, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01)

CPC H01L 29/6681 (2013.01) [H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/7851 (2013.01)]

20 Claims

1. A semiconductor structure, comprising:

a first fin, a second fin, a third fin and a fourth fin disposed over a substrate;

a first epitaxial feature extending over and in contact with the first fin and the second fin;

a second epitaxial feature extending over and in contact with the third fin and the fourth fin;

an isolation feature disposed between the first fin and the second fin, the second fin and the third fin, and between the third fin and the fourth fin; and

a dielectric fin disposed partially in the isolation feature between the second fin and the third fin,

wherein the dielectric fin includes an inner feature and an outer layer disposed around the inner feature,

wherein a composition of the outer layer is different from a composition of the inner feature,

wherein a portion of the outer layer extends into the inner feature.