US 12,206,012 B2
Reducing K values of dielectric films through anneal
Wen-Kai Lin, Yilan County (TW); Che-Hao Chang, Hsinchu (TW); Chi On Chui, Hsinchu (TW); Yung-Cheng Lu, Hsinchu (TW); and Szu-Ying Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 28, 2021, as Appl. No. 17/333,592.
Claims priority of provisional application 63/142,546, filed on Jan. 28, 2021.
Prior Publication US 2022/0238697 A1, Jul. 28, 2022
Int. Cl. H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01)
CPC H01L 29/66553 (2013.01) [H01L 21/0228 (2013.01); H01L 29/0665 (2013.01); H01L 29/401 (2013.01); H01L 29/41775 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
performing an atomic layer deposition (ALD) process to form a dielectric layer on a wafer, the ALD process comprises an ALD cycle comprising:
pulsing calypso ((SiCl3)2CH2);
purging the calypso;
pulsing ammonia; and
purging the ammonia;
performing an oxidation process on the dielectric layer using oxygen (O2) as a process gas; and
after the oxidation process, performing a dry anneal process on the dielectric layer that has been oxidized in the oxidation process.