	US 12,206,010 B2
	Method for forming a semiconductor structure
Shu-Ming Lee, Taichung (TW); Yung-Han Chiu, Taichung (TW); Chia-Hung Liu, Taichung (TW); and Tzu-Ming Ou Yang, Tainan (TW)
Assigned to WINBOND ELECTRONICS CORP., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on Apr. 20, 2023, as Appl. No. 18/304,137.
Application 18/304,137 is a division of application No. 16/674,428, filed on Nov. 5, 2019, granted, now 11,664,438.
Prior Publication US 2023/0268417 A1, Aug. 24, 2023
Int. Cl. H01L 21/76 (2006.01); H01L 21/28 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/762 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01)

CPC H01L 29/66545 (2013.01) [H01L 21/28114 (2013.01); H01L 21/3065 (2013.01); H01L 21/3081 (2013.01); H01L 21/3086 (2013.01); H01L 21/31116 (2013.01); H01L 21/76224 (2013.01); H01L 29/40114 (2019.08); H01L 29/42376 (2013.01); H01L 29/66825 (2013.01); H01L 29/788 (2013.01)]

19 Claims

1. A method for forming a semiconductor structure, comprising:

providing a semiconductor substrate;

forming a sacrificial layer over the semiconductor substrate;

etching the sacrificial layer to form a sacrificial pattern, wherein etching the sacrificial layer comprises introducing an etching gas and a passivation gas in a first step, wherein a ratio of a flow rate of the etching gas to a flow rate of the passivation gas in the first step is a first ratio;

etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate;

trimming the sacrificial pattern, comprising introducing the etching gas and the passivation gas in a second step, wherein a ratio of a flow rate of the etching gas to a flow rate of the passivation gas in the second step is a second ratio, wherein the second ratio is less than the first ratio; and

replacing the trimmed sacrificial pattern with a gate electrode.