US 12,205,997 B2
Integrated circuit including backside conductive vias
Chung-Liang Cheng, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Oct. 14, 2021, as Appl. No. 17/501,852.
Claims priority of provisional application 63/160,442, filed on Mar. 12, 2021.
Prior Publication US 2022/0293750 A1, Sep. 15, 2022
Int. Cl. H01L 21/00 (2006.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01); H01L 21/8234 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/41733 (2013.01) [H01L 21/0259 (2013.01); H01L 21/28518 (2013.01); H01L 21/823412 (2013.01); H01L 21/823425 (2013.01); H01L 21/823475 (2013.01); H01L 21/823481 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 27/088 (2013.01); H01L 29/0665 (2013.01); H01L 29/401 (2013.01); H01L 29/42392 (2013.01); H01L 29/78696 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a first chip including:
a substrate including:
a first semiconductor layer;
an etch-stop layer on the first semiconductor layer; and
a second semiconductor layer on the etch-stop layer
a first gate all around transistor on the substrate and having a source region; and
a backside conductive via extending through the substrate to the source region, wherein the conductive via extends through the first semiconductor layer, the etch-stop layer, and the second semiconductor layer.