providing a semiconductor substrate defining therein a drift region and a body region, the drift region defining therein a drain region, the body region defining therein a source region;

depositing a barrier layer on the semiconductor substrate, the barrier layer comprising n etch stop layers, wherein the n is an integer greater than or equal to 2, wherein the etch stop layers are stacked one above another, and distances from the etch stop layers to the semiconductor substrate increase from a first one to an n-th one of the etch stop layers, wherein an insulating layer is disposed between the first one of the etch stop layers and the semiconductor substrate, and wherein an insulating layer is disposed between each adjacent two of the etch stop layers; and

forming an interlayer dielectric layer and etching the interlayer dielectric layer together with the barrier layer to form n field plate holes, wherein a first one to an n-th one of the field plate holes end on the first one to the n-th one of the etch stop layers, respectively.