CPC H01L 27/101 (2013.01) [G11C 8/14 (2013.01); H01L 28/60 (2013.01)] | 20 Claims |
1. A method of fabricating a semiconductor device, the method comprising:
forming a mold structure on a substrate and the mold structure includes a mold layer and a supporting layer;
performing etching process on the mold structure to form conductive hole in the mold structure; and
forming a bottom electrode in the conductive hole,
wherein forming the bottom electrode comprises;
forming a first portion of the bottom electrode in the conductive hole, the first portion including a seam that is externally exposed, and
forming a second portion on the first portion, the exposed seam closed by the second portion.
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