US 12,205,924 B2
Semiconductor packages with chiplets coupled to a memory device
Andrew Collins, Chandler, AZ (US); and Jianyong Xie, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Feb. 21, 2023, as Appl. No. 18/112,430.
Application 18/112,430 is a continuation of application No. 16/147,560, filed on Sep. 28, 2018, granted, now 11,610,862.
Prior Publication US 2023/0197682 A1, Jun. 22, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01)
CPC H01L 25/0655 (2013.01) [H01L 23/528 (2013.01); H01L 24/17 (2013.01); H01L 2924/15311 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package comprising:
a package substrate;
a device above the package substrate, the device having a first edge, a second edge, a third edge, and a fourth edge, the first edge laterally opposite the third edge, and the second edge laterally opposite the fourth edge;
a first die above the package substrate, the first die laterally spaced apart from the first edge of the device;
a first bridge in the package substrate beneath the first die and the device, the first bridge coupling the first die to the device;
a second die above the package substrate, the second die laterally spaced apart from the first edge of the device;
a second bridge in the package substrate beneath the second die and the device, the second bridge coupling the second die to the device;
a third die above the package substrate, the third die laterally spaced apart from the third edge of the device;
a third bridge in the package substrate beneath the third die and the device, the third bridge coupling the third die to the device;
a fourth die above the package substrate, the fourth die laterally spaced apart from the third edge of the device;
a fourth bridge in the package substrate beneath the fourth die and the device, the fourth bridge coupling the fourth die to the device; and
a plurality of conductive vias in the package substrate, a first group of the plurality of conductive vias laterally spaced apart from a first side of the first bridge, a second group of the plurality of conductive vias laterally between a second side of the first bridge and a first side of the second bridge, and a third group of the plurality of conductive vias laterally spaced apart from a second side of the second bridge.