US 12,205,920 B2
Enhanced thermal control of a hybrid chip assembly
Raphael Beaupré-Laflamme, Quebec (CA); François Pelletier, Quebec (CA); and Louis-Philippe Bibeau, Saint-Augustin-de-Desmaures (CA)
Assigned to Ciena Corporation, Hanover, MD (US)
Filed by Ciena Corporation, Hanover, MD (US)
Filed on Feb. 3, 2022, as Appl. No. 17/592,037.
Prior Publication US 2023/0245993 A1, Aug. 3, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 23/13 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 24/32 (2013.01) [H01L 23/13 (2013.01); H01L 24/83 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/83855 (2013.01)] 13 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a first chip comprising a cavity located between lateral walls of the first chip; and
a carrier mechanically anchored with the first chip at a top portion of the lateral walls, the carrier comprising a second chip configured to optically align with the first chip at a side portion of one of the lateral walls,
wherein the first and second chips are free of contact at a bottom surface of the second chip and a bottom surface of the cavity.