US 12,205,906 B2
Electronic package and fabrication method thereof
Yu-Lung Huang, Taichung (TW); Chee-Key Chung, Taichung (TW); Yuan-Hung Hsu, Taichung (TW); and Chi-Jen Chen, Taichung (TW)
Assigned to SILICONWARE PRECISION INDUSTRIES CO., LTD., Taichung (TW)
Filed by SILICONWARE PRECISION INDUSTRIES CO., LTD., Taichung (TW)
Filed on Dec. 12, 2023, as Appl. No. 18/537,638.
Application 18/537,638 is a division of application No. 16/867,937, filed on May 6, 2020, granted, now 11,881,459.
Claims priority of application No. 108133228 (TW), filed on Sep. 16, 2019.
Prior Publication US 2024/0162169 A1, May 16, 2024
Int. Cl. H01L 23/00 (2006.01); H01L 21/768 (2006.01); H01L 23/538 (2006.01)
CPC H01L 23/562 (2013.01) [H01L 21/76804 (2013.01); H01L 23/5384 (2013.01); H01L 23/5386 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A method for fabricating an electronic package, comprising:
providing a plurality of electronic elements;
forming a spacing structure between any adjacent two of the plurality of electronic elements for connecting the adjacent two of the electronic elements, wherein a filling material and an encapsulant constitute the spacing structure, wherein the filling material is formed between the adjacent two of the plurality of electronic elements, the filling material is in contact with opposing side surfaces of the adjacent two of the plurality of electronic elements, and a first recess is formed within the filling material, and wherein the encapsulant is formed in the first recess, and a second recess is formed within the encapsulant;
and
providing a plurality of conductive elements electrically connected to the plurality of electronic elements to serve as external contacts.