CPC H01L 23/3192 (2013.01) [H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 23/481 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/96 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/181 (2013.01)] | 20 Claims |
1. A manufacturing method, comprising:
forming a redistribution layer;
bonding first semiconductor dies onto a first surface of the redistribution layer;
molding the first semiconductor dies with a molding compound;
bonding a second semiconductor die onto a second surface of the redistribution layer opposite to the first surface;
providing a circuit substrate having a dielectric material and a floor plate embedded in the dielectric material;
forming a cavity in the circuit substrate by removing a portion of the dielectric material without exposing the floor plate;
connecting the circuit substrate with the redistribution layer and accommodating the second semiconductor die in the cavity; and
dispensing an underfill into the cavity to fill up the cavity and surround the second semiconductor die and fill between the circuit substrate and the redistribution layer.
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