US 12,205,822 B2
Nanostructure and manufacturing method thereof
Chia-Cheng Chao, Hsinchu (TW); Hsin-Chieh Huang, Taoyuan (TW); and Yu-Wen Wang, New Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Oct. 6, 2021, as Appl. No. 17/450,123.
Claims priority of provisional application 63/168,787, filed on Mar. 31, 2021.
Prior Publication US 2022/0319859 A1, Oct. 6, 2022
Int. Cl. H01L 21/306 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01)
CPC H01L 21/30604 (2013.01) [H01L 21/31053 (2013.01); H01L 21/31144 (2013.01); H01L 29/0665 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor device, comprising:
forming a nanostructure having a first set of layers of a first material and a second set of layers, alternating with the first set of layers, having a second material;
depositing a hard mask on a top layer of the first set of layers, the hard mask including a first hard mask layer on the top layer of the first set of layers and a second hard mask layer on the first hard mask layer;
depositing elements of a cladding structure, comprising a silicon germanium-based material, on sidewalls of the nanostructure and the hard mask;
removing a top portion of the cladding structure; and
removing the second hard mask layer after removing the top portion of the cladding structure.