| CPC G11C 16/3459 (2013.01) [G11C 16/102 (2013.01); G11C 16/14 (2013.01); G11C 16/3404 (2013.01)] | 9 Claims |
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1. An apparatus comprising:
one or more control circuits configured to connect to a memory structure comprising non-volatile memory cells, wherein the one or more control circuits are configured to:
program a first group of the memory cells in the memory structure using a four-bit code having sixteen states and four pages;
program a second group of the memory cells in the memory structure using a three-bit code based on three pages of the four pages, wherein the three-bit code includes eight states of the sixteen states of the four-bit code for which an unused page of the four-bit code comprises a default value; and
begin to verify during programming using the three-bit code, for each particular state of a first set of one or more states of the eight states, during a program-verify loop determined based on whether a number of memory cells having a threshold voltage above a verify voltage for a state that immediately precedes the particular state in threshold voltage is greater than a pre-determined number.
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