| CPC G09G 3/32 (2013.01) [B60K 35/00 (2013.01); G09G 5/10 (2013.01); B60K 35/22 (2024.01); B60K 2360/1523 (2024.01); B60K 2360/349 (2024.01); G09G 2320/0633 (2013.01)] | 7 Claims |
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1. A display matrix control circuit for controlling a plurality of light emitting devices arranged in rows and columns, comprising:
a row selection input for a row selection signal and a column data input for a data signal;
a ramp signal input for a ramp signal having a level between a first value and a second value and a trigger input for a trigger signal;
a column data buffer configured to buffer the data signal in response to the row selection signal; and
a pulse generator coupled to the column data buffer via a first input and to the ramp signal input via a second input, the pulse generator being configured to provide a buffered output signal to control an on/off ratio of at least one of said plurality of light emitting devices in response to the trigger signal, the data signal, and the ramp signal,
wherein the pulse generator comprises:
a comparator device for comparing the buffered data signal with the ramp signal; and
an RS Flip-Flop having a R-input coupled directly to an output of the comparator device and a S-input receiving the trigger signal.
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