| CPC G06J 1/00 (2013.01) [G06F 17/16 (2013.01)] | 20 Claims |
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1. A device comprising:
a first processing core comprising a resistive memory array;
a digital processing core comprising a digital memory; and
a controller coupled to the first processing core and the digital processing core to selectively apply:
a first input data to the first processing core to perform an analog computation; and
a second input data to the digital processing core to perform a conditional operation.
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