| CPC G06F 1/3203 (2013.01) [G06F 11/3656 (2013.01)] | 20 Claims |
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1. A circuit comprising:
a subsystem;
an interface coupled to the subsystem, the interface including:
power processing and management (PPM) circuitry coupled to the subsystem, and
arbitration logic coupled to the PPM circuitry; and
a debugger coupled to the arbitration logic; wherein
the debugger is configured to issue a debug request to perform a debug operation on the subsystem, the debug request being issued to the arbitration logic;
the arbitration logic is configured to, in response to the debug request, provide an interrupt associated with the subsystem to the PPM circuitry; and
the PPM circuitry is configured to:
in response to the interrupt and in response to determining that the subsystem is in an unpowered state, power on the subsystem and provide a first notification to the arbitration logic indicating that the subsystem is in a powered state; and
receive a second notification from the arbitration logic that the debug operation related to the debug request is complete, and power off the subsystem in response to the second notification.
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