US RE49,805 E1
Apparatus and circuit for processing carrier aggregation
Joo-Hyun Do, Seoul (KR); and In-Hyoung Kim, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 10, 2022, as Appl. No. 17/572,019.
Application 14/922,798 is a continuation of application No. 16/700,389, filed on Dec. 2, 2019, granted, now RE48893, issued on Jan. 11, 2022.
Application 14/922,798 is a continuation of application No. 14/152,297, filed on Jan. 10, 2014, granted, now 9,197,477, issued on Nov. 24, 2015.
Application 17/572,019 is a reissue of application No. 14/922,798, filed on Oct. 26, 2015, granted, now 9,838,237, issued on Dec. 5, 2017.
Application 16/700,389 is a reissue of application No. 14/922,798, filed on Oct. 26, 2015, granted, now 9,838,237, issued on Dec. 5, 2017.
Claims priority of application No. 10-2013-0029965 (KR), filed on Mar. 20, 2013.
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 27/26 (2006.01); H04L 5/00 (2006.01); H04L 27/00 (2006.01)
CPC H04L 27/2657 (2013.01) [H04L 5/001 (2013.01); H04L 2027/0065 (2013.01)] 20 Claims
OG exemplary drawing
 
[ 21. An apparatus for supporting carrier aggregation (CA), the apparatus comprising:
a temperature compensated crystal oscillator (TCXO) configured to generate a reference clock;
a plurality of phase lock loop (PLL) circuits configured to generate a plurality of carrier frequencies that respectively correspond to a plurality of component carriers (CCs), using the reference clock generated by the TCXO; and
a plurality of CC circuits configured to estimate a plurality of frequency offsets that respectively correspond to the plurality of CCs, using the plurality of generated carrier frequencies by the plurality of PLL circuits.]