CPC H10B 41/35 (2023.02) [H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02)] | 2 Claims |
1. A three-dimensional memory device, comprising:
an alternating stack of insulating layers and electrically conductive layers;
memory openings vertically extending through the alternating stack;
memory opening fill structures located within the memory openings, wherein each of the memory opening fill structures comprises a respective vertical stack of memory elements; and
backside blocking dielectric layers which surround the respective electrically conductive layers on at least three sides;
wherein each of the electrically conductive layers comprises a metallic fill material layer and a vertical tubular metallic liner laterally surrounding a respective one of the memory opening fill structures, and located between the metallic fill material layer and a vertically-extending portion of the respective one of the backside blocking dielectric layers, wherein the vertical tubular metallic liner lacks any horizontally-extending portion which extends in a horizontal direction along respective top and bottom surfaces of the insulating layers; and
wherein, for each of the electrically conductive layers, an outer periphery of a top surface of the tubular metallic liner is laterally offset outward from an inner periphery of the top surface of the tubular metallic liner by a lateral distance between an inner sidewall of the tubular metallic liner and an outer sidewall of the tubular metallic liner.
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