CPC H04W 52/241 (2013.01) [H04J 11/005 (2013.01); H04J 11/0066 (2013.01); H04L 5/006 (2013.01); H04L 5/0021 (2013.01); H04L 5/0023 (2013.01); H04L 5/0073 (2013.01); H04W 24/02 (2013.01); H04W 24/08 (2013.01); H04W 24/10 (2013.01); H04W 52/243 (2013.01); H04W 72/541 (2023.01); H04W 72/542 (2023.01); H04W 88/08 (2013.01)] | 20 Claims |
1. A device comprising:
a processing system including a processor; and
a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations comprising:
obtaining a plurality of Signal to Interference plus Noise Ratio (SINR) measurements from each of a plurality of cell sites in communication with the processing system;
identifying a cell site with a lowest SINR measurement;
comparing the lowest SINR measurement to a first SINR threshold representing a minimum expected SINR performance for a cell site of the plurality of cell sites;
in accordance with the lowest SINR measurement being below the first SINR threshold, initiating a corrective action to improve the SINR measurement of the identified cell site; and
determining whether the SINR measurement of the identified cell site has improved as a result of the corrective action.
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