CPC H03K 19/177 (2013.01) [G06F 1/08 (2013.01); H03K 21/08 (2013.01); G06F 2115/02 (2020.01)] | 20 Claims |
1. A circuit comprising:
a first timer circuit including a first timer trigger input and a first timer trigger output; and
a second timer circuit including:
a second timer trigger input coupled to the first timer trigger output in a first programmable matrix; and
a second timer trigger output coupled to the first timer trigger input in the first programmable matrix.
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