US 11,876,491 B2
Digital predistortion calibration
Raghu Ganesan, Bangalore (IN); Harish Kumar Ramesh, Bangalore (IN); John Roshan Samuel Chandran, Bangalore (IN); and Lakshmi Bala Krishna Manoja Vinnakota, Richardson, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Oct. 14, 2021, as Appl. No. 17/501,212.
Application 17/501,212 is a continuation of application No. 17/148,304, filed on Jan. 13, 2021, granted, now 11,177,778.
Application 17/148,304 is a continuation of application No. 16/288,094, filed on Feb. 27, 2019, granted, now 10,924,068, issued on Feb. 16, 2021.
Prior Publication US 2022/0038061 A1, Feb. 3, 2022
Int. Cl. H03F 1/32 (2006.01); H04B 17/12 (2015.01); H04B 17/24 (2015.01); H04B 17/14 (2015.01)
CPC H03F 1/3247 (2013.01) [H04B 17/12 (2015.01); H04B 17/14 (2015.01); H04B 17/24 (2015.01)] 16 Claims
OG exemplary drawing
 
9. A device comprising:
a receiver configured to sample a signal having a pattern of alternating amplitude steps separated by a silence gap length, wherein the receiver is configured to provide a sample signal, wherein the pattern of alternating amplitude steps includes a first set of steps that increase in amplitude over time interleaved with a second set of steps that decrease in amplitude over time;
an accumulator coupled to the receiver and configured to receive the sample signal and determine an accumulated sample signal for each of the amplitude steps; and
a processor coupled to the accumulator, wherein the processor is configured to execute instructions stored on a non-transitory computer readable storage medium that when executed cause the processor to:
determine a first value and a second value for the accumulated sample signal for each of the amplitude steps; and
determine a correction value based on the first value and the second value for the accumulated sample signal for each of the amplitude steps.