US 11,876,132 B2
Semiconductor device
Toshifumi Nishiguchi, Hakusan Ishikawa (JP)
Assigned to KABUSHIKI KAISHA TOSHIBA, Tokyo (JP); and TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Tokyo (JP)
Filed by Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed on Sep. 9, 2021, as Appl. No. 17/470,647.
Claims priority of application No. 2021-045559 (JP), filed on Mar. 19, 2021.
Prior Publication US 2022/0302302 A1, Sep. 22, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 29/40 (2006.01); H01L 29/94 (2006.01)
CPC H01L 29/7813 (2013.01) [H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/4236 (2013.01); H01L 29/42364 (2013.01); H01L 29/4991 (2013.01); H01L 29/66734 (2013.01); H01L 29/94 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first electrode;
a first conductivity type first semiconductor region provided on the first electrode;
a second conductivity type second semiconductor region provided on the first semiconductor region;
a first conductivity type third semiconductor region selectively provided on the second semiconductor region;
a second electrode provided on the third semiconductor region and electrically connected to the third semiconductor region;
a third electrode aligned with the first semiconductor region and the second semiconductor region in a second direction perpendicular to a first direction from the first electrode toward the first semiconductor region;
a gate electrode provided between the third electrode and the second semiconductor region in the second direction;
a first insulating portion including a first insulating region provided between the third electrode and the first semiconductor region in the second direction and facing the third electrode in the second direction, a second insulating region facing the first semiconductor region in the second direction, and at least one air-gap region located between the first insulating region and the second insulating region in the second direction; and
a second insulating portion provided between the gate electrode and the second semiconductor region in the second direction,
a distance between the first electrode and a lower end of the third electrode being less than a distance between the first electrode and a lower end of the gate electrode, and
the first insulating region being located between the third electrode and the air-gap region in the second direction.